diff options
| author | Stefan Markovic <smarkovic@wavecomp.com> | 2018-10-16 16:59:18 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-10-18 20:37:20 +0200 |
| commit | 49735f76db25bf10f57973d5249f17151b801760 (patch) | |
| tree | ece866485958568c71417bf1714609fea8ca6e0f /target/mips | |
| parent | 908f6be1b9cbc270470230f805d6f7474ab3178d (diff) | |
target/mips: Add CP0 Config2 to DisasContext
Add field corresponding to CP0 Config2 to DisasContext. This is
needed for availability control via Config2 bits.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 1f10f48bc0..e26d54ac8c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1988,6 +1988,7 @@ typedef struct DisasContext { uint32_t opcode; uint64_t insn_flags; int32_t CP0_Config1; + int32_t CP0_Config2; int32_t CP0_Config3; int32_t CP0_Config5; /* Routine used to access memory */ @@ -25835,6 +25836,7 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->saved_pc = -1; ctx->insn_flags = env->insn_flags; ctx->CP0_Config1 = env->CP0_Config1; + ctx->CP0_Config2 = env->CP0_Config2; ctx->CP0_Config3 = env->CP0_Config3; ctx->CP0_Config5 = env->CP0_Config5; ctx->btarget = 0; |