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authorAleksandar Markovic <amarkovic@wavecomp.com>2019-08-19 14:07:46 +0200
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-08-19 19:53:37 +0200
commitcf02a1164815ed6682c21070ddc95b88c31ff476 (patch)
treecb09c5305b22c8ae8c5fc538e923d8cb705cc513 /target/mips
parent2f0d0196721d207297ce00a6cb39fc52005ccc7a (diff)
target/mips: Style improvements in cpu.c
Fixes mostly errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1566216496-17375-8-git-send-email-aleksandar.markovic@rt-rk.com>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/cpu.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 39eafafc5c..3ffa342187 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -57,9 +57,11 @@ static bool mips_cpu_has_work(CPUState *cs)
CPUMIPSState *env = &cpu->env;
bool has_work = false;
- /* Prior to MIPS Release 6 it is implementation dependent if non-enabled
- interrupts wake-up the CPU, however most of the implementations only
- check for interrupts that can be taken. */
+ /*
+ * Prior to MIPS Release 6 it is implementation dependent if non-enabled
+ * interrupts wake-up the CPU, however most of the implementations only
+ * check for interrupts that can be taken.
+ */
if ((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) {
if (cpu_mips_hw_interrupts_enabled(env) ||
@@ -70,8 +72,10 @@ static bool mips_cpu_has_work(CPUState *cs)
/* MIPS-MT has the ability to halt the CPU. */
if (env->CP0_Config3 & (1 << CP0C3_MT)) {
- /* The QEMU model will issue an _WAKE request whenever the CPUs
- should be woken up. */
+ /*
+ * The QEMU model will issue an _WAKE request whenever the CPUs
+ * should be woken up.
+ */
if (cs->interrupt_request & CPU_INTERRUPT_WAKE) {
has_work = true;
}
@@ -112,7 +116,8 @@ static void mips_cpu_reset(CPUState *s)
#endif
}
-static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
+static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info)
+{
MIPSCPU *cpu = MIPS_CPU(s);
CPUMIPSState *env = &cpu->env;