diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-07 22:32:49 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 19:58:54 +0100 |
| commit | ac70f9767cba3a5966f7eefc102fcda8b3c7d09e (patch) | |
| tree | a511e97d95af30981bfd6fd4c9201299af6132c8 /target/mips/translate.c | |
| parent | 1ab3a0de2f40f70bdfbd1a319a9734089bddcf72 (diff) | |
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
As cpu_supports_isa() / cpu_supports_cps_smp() take a 'cpu_type'
name argument, rename them cpu_type_supports_FEAT().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips/translate.c')
| -rw-r--r-- | target/mips/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index c64a1bc42e..b8ed16bb77 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31770,13 +31770,13 @@ void cpu_mips_realize_env(CPUMIPSState *env) mvp_init(env, env->cpu_model); } -bool cpu_supports_cps_smp(const char *cpu_type) +bool cpu_type_supports_cps_smp(const char *cpu_type) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(const char *cpu_type, uint64_t isa) +bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); return (mcc->cpu_def->insn_flags & isa) != 0; |