diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-09-11 18:54:24 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 12:00:21 -0700 |
| commit | 6eb66e086a5b03ed197ad8db8b637ab304bbc4d9 (patch) | |
| tree | 5ed6a3021cd08706c8bf35a9007f0c2deecc4225 /target/mips/tcg/user/tlb_helper.c | |
| parent | eb3ef3136eb2a56026d7f1516082e14a0c98f152 (diff) | |
target/mips: Restrict cpu_exec_interrupt() handler to sysemu
Restrict cpu_exec_interrupt() and its callees to sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210911165434.531552-15-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/tcg/user/tlb_helper.c')
| -rw-r--r-- | target/mips/tcg/user/tlb_helper.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/mips/tcg/user/tlb_helper.c b/target/mips/tcg/user/tlb_helper.c index b835144b82..210c6d529e 100644 --- a/target/mips/tcg/user/tlb_helper.c +++ b/target/mips/tcg/user/tlb_helper.c @@ -57,8 +57,3 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, raise_mmu_exception(env, address, access_type); do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr); } - -void mips_cpu_do_interrupt(CPUState *cs) -{ - cs->exception_index = EXCP_NONE; -} |