diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2022-07-29 19:17:02 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2022-08-02 12:34:00 -0700 |
commit | d44971e725c02e0656d2f53d4fb564f92e06aef7 (patch) | |
tree | bd997d6fd75f68109c166243284c14ad074e2034 /target/mips/tcg/sysemu/tlb_helper.c | |
parent | 430a388ef4a6e02e762a9c5f86c539f886a6a61a (diff) |
target/mips: Advance pc after semihosting exception
Delay generating the exception until after we know the
insn length, and record that length in env->error_code.
Fixes: 8ec7e3c53d4 ("target/mips: Use an exception for semihosting")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1126
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/tcg/sysemu/tlb_helper.c')
-rw-r--r-- | target/mips/tcg/sysemu/tlb_helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 57ffad2902..9d16859c0a 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -1056,6 +1056,7 @@ void mips_cpu_do_interrupt(CPUState *cs) case EXCP_SEMIHOST: cs->exception_index = EXCP_NONE; mips_semihosting(env); + env->active_tc.PC += env->error_code; return; case EXCP_DSS: env->CP0_Debug |= 1 << CP0DB_DSS; |