diff options
author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2023-05-21 12:35:50 +0200 |
---|---|---|
committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-07-10 21:53:03 +0200 |
commit | b263688d236bc07266ce393fdce8c9b6bfd9d8d8 (patch) | |
tree | 6633ab2068b74ed2bd72ef5019739a40eb730321 /target/mips/tcg/sysemu/lcsr_helper.c | |
parent | fcb237e64f9d026c03d635579c7b288d0008a6e5 (diff) |
target/mips: Rework cp0_timer with clock API
Previous implementation of MIPS cp0_timer computes a
cp0_count_ns based on input clock. However rounding
error of cp0_count_ns can affect precision of cp0_timer.
Using clock API and a divider for cp0_timer, so we can
use clock_ns_to_ticks/clock_ns_to_ticks to avoid rounding
issue.
Also workaround the situation that in such handler flow:
count = read_c0_count()
write_c0_compare(count)
If timer had not progressed when compare was written, the
interrupt would trigger again.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230521110037.90049-1-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'target/mips/tcg/sysemu/lcsr_helper.c')
0 files changed, 0 insertions, 0 deletions