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authorRichard Henderson <richard.henderson@linaro.org>2023-05-02 14:57:37 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-05-05 17:05:28 +0100
commit6d0cad12594243375b255de76cc10f9b607cb2c9 (patch)
tree0d78c6685eac0cd1841cf460c0e5b6c8366ae268 /target/mips/tcg/nanomips_translate.c.inc
parentb7a94da9550be04441ffd91f0865d604c8a804cd (diff)
target/mips: Finish conversion to tcg_gen_qemu_{ld,st}_*
Convert away from the old interface with the implicit MemOp argument. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230502135741.1158035-6-richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/tcg/nanomips_translate.c.inc')
-rw-r--r--target/mips/tcg/nanomips_translate.c.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index 9398e28000..97b9572caa 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -998,7 +998,7 @@ static void gen_llwp(DisasContext *ctx, uint32_t base, int16_t offset,
TCGv tmp2 = tcg_temp_new();
gen_base_offset_addr(ctx, taddr, base, offset);
- tcg_gen_qemu_ld64(tval, taddr, ctx->mem_idx);
+ tcg_gen_qemu_ld_i64(tval, taddr, ctx->mem_idx, MO_TEUQ);
if (cpu_is_bigendian(ctx)) {
tcg_gen_extr_i64_tl(tmp2, tmp1, tval);
} else {