diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-11-29 22:24:40 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-01-14 17:13:53 +0100 |
| commit | c7a9ef75173f090616328d6870f71e8da2b6bd50 (patch) | |
| tree | c8ff947fcff0722228df080d8fc38e6610b772a0 /target/mips/msa32.decode | |
| parent | 878b87b54176d7cea4a74ec544703e408776ed34 (diff) | |
target/mips: Introduce decode tree bindings for MSA ASE
Introduce the 'msa32' decodetree config for the 32-bit MSA ASE.
We start by decoding:
- the branch instructions,
- all instructions based on the MSA opcode.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201215225757.764263-20-f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Diffstat (limited to 'target/mips/msa32.decode')
| -rw-r--r-- | target/mips/msa32.decode | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/target/mips/msa32.decode b/target/mips/msa32.decode new file mode 100644 index 0000000000..d69675132b --- /dev/null +++ b/target/mips/msa32.decode @@ -0,0 +1,24 @@ +# MIPS SIMD Architecture Module instruction set +# +# Copyright (C) 2020 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: +# MIPS Architecture for Programmers Volume IV-j +# The MIPS32 SIMD Architecture Module, Revision 1.12 +# (Document Number: MD00866-2B-MSA32-AFP-01.12) +# + +&msa_bz df wt s16 + +@bz ...... ... .. wt:5 s16:16 &msa_bz df=3 +@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz + +BZ_V 010001 01011 ..... ................ @bz +BNZ_V 010001 01111 ..... ................ @bz + +BZ_x 010001 110 .. ..... ................ @bz_df +BNZ_x 010001 111 .. ..... ................ @bz_df + +MSA 011110 -------------------------- |