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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-16 17:23:15 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-14 17:13:53 +0100
commit08e2262fada2de06232e8099bddf6e03df015c5a (patch)
treee3d05d26049d986d77f1d8559a6e32cd9ed68fb7 /target/mips/mips-defs.h
parentce49581feb1006be21707713d86c05bb189e3f66 (diff)
target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1
Use the single ISA_MIPS32 definition to check if the Release 1 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R1 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-7-f4bug@amsat.org>
Diffstat (limited to 'target/mips/mips-defs.h')
-rw-r--r--target/mips/mips-defs.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 89a9a4dda3..23ce8b8406 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -18,7 +18,6 @@
#define ISA_MIPS5 0x0000000000000010ULL
#define ISA_MIPS32 0x0000000000000020ULL
#define ISA_MIPS32R2 0x0000000000000040ULL
-#define ISA_MIPS64 0x0000000000000080ULL
#define ISA_MIPS64R2 0x0000000000000100ULL
#define ISA_MIPS32R3 0x0000000000000200ULL
#define ISA_MIPS64R3 0x0000000000000400ULL
@@ -75,7 +74,7 @@
/* MIPS Technologies "Release 1" */
#define CPU_MIPS32R1 (CPU_MIPS2 | ISA_MIPS32)
-#define CPU_MIPS64R1 (CPU_MIPS5 | CPU_MIPS32R1 | ISA_MIPS64)
+#define CPU_MIPS64R1 (CPU_MIPS5 | CPU_MIPS32R1)
/* MIPS Technologies "Release 2" */
#define CPU_MIPS32R2 (CPU_MIPS32R1 | ISA_MIPS32R2)