diff options
| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-08-02 16:16:01 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-08-24 17:51:59 +0200 |
| commit | fa7c0c9f5bc12970858a89f46dd5012c01545b80 (patch) | |
| tree | da9125bd79440625e27eb95194352c310fcc11c8 /target/mips/mips-defs.h | |
| parent | 1dfb85a8755096beecf182a617493d539259cbea (diff) | |
target/mips: Add preprocessor constants for nanoMIPS
Add ISA_NANOMIPS32 and CPU_NANOMIPS32 preprocessor constants.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Diffstat (limited to 'target/mips/mips-defs.h')
| -rw-r--r-- | target/mips/mips-defs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index d239069975..c8e99791ad 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -39,6 +39,7 @@ #define ISA_MIPS64R5 0x00001000 #define ISA_MIPS32R6 0x00002000 #define ISA_MIPS64R6 0x00004000 +#define ISA_NANOMIPS32 0x00008000 /* MIPS ASEs. */ #define ASE_MIPS16 0x00010000 @@ -87,6 +88,9 @@ #define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS32R6) #define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6 | ISA_MIPS64R6) +/* Wave Computing: "nanoMIPS" */ +#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32) + /* Strictly follow the architecture standard: - Disallow "special" instruction handling for PMON/SPIM. Note that we still maintain Count/Compare to match the host clock. */ |