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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-04-18 15:16:06 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-05-02 16:49:34 +0200
commit0a31c16c9ce2639c8706b9f863724ba42a46f121 (patch)
tree168fd4309d419652bc2b16ee1c9219f16ef280e0 /target/mips/meson.build
parent6fe25ce58798815237307cf1924ef5b4d13cac99 (diff)
target/mips: Add simple user-mode mips_cpu_do_interrupt()
The #ifdef'ry hides that the user-mode implementation of mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE. Add this simple implementation to tcg/user/tlb_helper.c, and the corresponding Meson machinery to build this file when user emulation is configured. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
Diffstat (limited to 'target/mips/meson.build')
-rw-r--r--target/mips/meson.build5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 15c2f835c6..ca3cc62cf7 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -6,6 +6,7 @@ gen = [
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]
+mips_user_ss = ss.source_set()
mips_ss = ss.source_set()
mips_ss.add(files(
'cpu.c',
@@ -34,6 +35,9 @@ mips_tcg_ss.add(when: 'TARGET_MIPS64', if_true: files(
), if_false: files(
'mxu_translate.c',
))
+if 'CONFIG_TCG' in config_all
+ subdir('tcg')
+endif
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
@@ -52,3 +56,4 @@ mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
target_arch += {'mips': mips_ss}
target_softmmu_arch += {'mips': mips_softmmu_ss}
+target_user_arch += {'mips': mips_user_ss}