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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-02-14 17:57:24 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-03-13 23:43:07 +0100 |
| commit | ffc672aa977131ccfccfd0c2aee2b004adb69ed5 (patch) | |
| tree | 3ac66a8b6d606d1599d9488dd9cb258456f2926c /target/mips/meson.build | |
| parent | c27b4579371e5d8eaed54182243ece54c752a4e5 (diff) | |
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
Introduce decodetree structure to decode the tx79 opcodes.
Start it by moving the existing MFHI1 and MFLO1 opcodes.
Remove unnecessary comments.
As the TX79 share opcodes with the TX19/TX39/TX49 CPUs,
we introduce the decode_ext_txx9() dispatcher where we
will add the other decoders later.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-9-f4bug@amsat.org>
Diffstat (limited to 'target/mips/meson.build')
| -rw-r--r-- | target/mips/meson.build | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/mips/meson.build b/target/mips/meson.build index 4a951e522d..3b131c4a7f 100644 --- a/target/mips/meson.build +++ b/target/mips/meson.build @@ -3,6 +3,7 @@ gen = [ decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'), decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'), decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'), + decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), ] mips_ss = ss.source_set() @@ -23,6 +24,10 @@ mips_tcg_ss.add(files( 'tlb_helper.c', 'translate.c', 'translate_addr_const.c', + 'txx9_translate.c', +)) +mips_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files( + 'tx79_translate.c', )) mips_tcg_ss.add(when: 'TARGET_MIPS64', if_false: files( 'mxu_translate.c', |