diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-16 12:26:56 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-01-14 17:13:53 +0100 |
| commit | bbd5e4a27f0e4e717f9bdf35fd9c1f42410dea04 (patch) | |
| tree | 196c324b01a725809108caf83f40546d48d8c195 /target/mips/internal.h | |
| parent | 13514fc93e6b2ead6e984bcd104975b6b4f375e8 (diff) | |
target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1
The MIPS ISA release '1' is common to 32/64-bit CPUs.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-12-f4bug@amsat.org>
Diffstat (limited to 'target/mips/internal.h')
| -rw-r--r-- | target/mips/internal.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 3466725b76..94910f75a6 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -411,7 +411,7 @@ static inline void compute_hflags(CPUMIPSState *env) if (env->active_fpu.fcr0 & (1 << FCR0_F64)) { env->hflags |= MIPS_HFLAG_COP1X; } - } else if (env->insn_flags & ISA_MIPS32) { + } else if (env->insn_flags & ISA_MIPS_R1) { if (env->hflags & MIPS_HFLAG_64) { env->hflags |= MIPS_HFLAG_COP1X; } |