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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-04-13 23:01:12 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-05-02 16:49:35 +0200
commit5679479b9a1b0dd4772904c3af0d02bb3c9e635f (patch)
tree047f35cb55993d1d0d3fcc354ba1d72dba0be3f4 /target/mips/internal.h
parent8aa52bdc87aaf54c497902a91aaf4096cb780660 (diff)
target/mips: Move CP0 helpers to sysemu/cp0.c
Opcodes accessing Coprocessor 0 are privileged. Move the CP0 helpers to sysemu/ and simplify the #ifdef'ry. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-28-f4bug@amsat.org>
Diffstat (limited to 'target/mips/internal.h')
-rw-r--r--target/mips/internal.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 07573c3e38..dd332b4dce 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -156,6 +156,11 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
+
+void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
+void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
+void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
+
extern const VMStateDescription vmstate_mips_cpu;
#endif /* !CONFIG_USER_ONLY */
@@ -405,8 +410,4 @@ static inline void compute_hflags(CPUMIPSState *env)
}
}
-void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
-void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
-void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
-
#endif