diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-04-13 11:46:18 +0200 |
---|---|---|
committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-02 16:49:35 +0200 |
commit | 920b48cc14fe44a466f7387263993e86b4e21bce (patch) | |
tree | 306f17548d0f096a31b66d724942f741d2171b80 /target/mips/internal.h | |
parent | c284201702386b159277422318e51697647a2047 (diff) |
target/mips: Move tlb_helper.c to tcg/sysemu/
Move tlb_helper.c to the tcg/sysemu/ subdir, along with
the following 3 declarations to tcg-internal.h:
- cpu_mips_tlb_flush()
- cpu_mips_translate_address()
- r4k_invalidate_tlb()
Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/
are only build when sysemu mode is configured.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-22-f4bug@amsat.org>
Diffstat (limited to 'target/mips/internal.h')
-rw-r--r-- | target/mips/internal.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 2c9666905d..558cdca4e8 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -164,16 +164,12 @@ void r4k_helper_tlbp(CPUMIPSState *env); void r4k_helper_tlbr(CPUMIPSState *env); void r4k_helper_tlbinv(CPUMIPSState *env); void r4k_helper_tlbinvf(CPUMIPSState *env); -void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra); void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr); -hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address, - MMUAccessType access_type, uintptr_t retaddr); - extern const VMStateDescription vmstate_mips_cpu; #endif /* !CONFIG_USER_ONLY */ @@ -423,7 +419,6 @@ static inline void compute_hflags(CPUMIPSState *env) } } -void cpu_mips_tlb_flush(CPUMIPSState *env); void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc); void cpu_mips_store_status(CPUMIPSState *env, target_ulong val); void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val); |