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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-11-29 23:57:02 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-14 17:13:53 +0100
commit72f31f60f829980ad22da8049bb41af0dc49c3f4 (patch)
treed9a81235b2335628f46381ba6673f8bab35993ef /target/mips/cpu-defs.c.inc
parent25a1362875874936c185eba72203de6e9581251e (diff)
target/mips: Simplify msa_reset()
Call msa_reset() unconditionally, but only reset the MSA registers if MSA is implemented. Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20201208003702.4088927-3-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cpu-defs.c.inc')
-rw-r--r--target/mips/cpu-defs.c.inc4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index 535d4c0c70..fe0f47aadf 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -978,6 +978,10 @@ static void mvp_init(CPUMIPSState *env)
static void msa_reset(CPUMIPSState *env)
{
+ if (!ase_msa_available(env)) {
+ return;
+ }
+
#ifdef CONFIG_USER_ONLY
/* MSA access enabled */
env->CP0_Config5 |= 1 << CP0C5_MSAEn;