diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-04-13 10:31:44 +0200 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-02 16:49:35 +0200 |
commit | 85d8da3fea0c4ff38bbe759febfc2d2299b33ccd (patch) | |
tree | 2213b38bf446082bf2f5c23d9303bd2c01b748f8 /target/mips/cp0_timer.c | |
parent | 44e3b05005c6696cd526a4575293513db453f4b5 (diff) |
target/mips: Move sysemu specific files under sysemu/ subfolder
Move sysemu-specific files under the new sysemu/ subfolder
and adapt the Meson machinery.
Update the KVM MIPS entry in MAINTAINERS.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-17-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cp0_timer.c')
-rw-r--r-- | target/mips/cp0_timer.c | 145 |
1 files changed, 0 insertions, 145 deletions
diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c deleted file mode 100644 index 70de95d338..0000000000 --- a/target/mips/cp0_timer.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * QEMU MIPS timer support - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "qemu/osdep.h" -#include "hw/irq.h" -#include "hw/mips/cpudevs.h" -#include "qemu/timer.h" -#include "sysemu/kvm.h" -#include "internal.h" - -/* MIPS R4K timer */ -static void cpu_mips_timer_update(CPUMIPSState *env) -{ - uint64_t now_ns, next_ns; - uint32_t wait; - - now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - wait = env->CP0_Compare - env->CP0_Count - - (uint32_t)(now_ns / env->cp0_count_ns); - next_ns = now_ns + (uint64_t)wait * env->cp0_count_ns; - timer_mod(env->timer, next_ns); -} - -/* Expire the timer. */ -static void cpu_mips_timer_expire(CPUMIPSState *env) -{ - cpu_mips_timer_update(env); - if (env->insn_flags & ISA_MIPS_R2) { - env->CP0_Cause |= 1 << CP0Ca_TI; - } - qemu_irq_raise(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); -} - -uint32_t cpu_mips_get_count(CPUMIPSState *env) -{ - if (env->CP0_Cause & (1 << CP0Ca_DC)) { - return env->CP0_Count; - } else { - uint64_t now_ns; - - now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - if (timer_pending(env->timer) - && timer_expired(env->timer, now_ns)) { - /* The timer has already expired. */ - cpu_mips_timer_expire(env); - } - - return env->CP0_Count + (uint32_t)(now_ns / env->cp0_count_ns); - } -} - -void cpu_mips_store_count(CPUMIPSState *env, uint32_t count) -{ - /* - * This gets called from cpu_state_reset(), potentially before timer init. - * So env->timer may be NULL, which is also the case with KVM enabled so - * treat timer as disabled in that case. - */ - if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) { - env->CP0_Count = count; - } else { - /* Store new count register */ - env->CP0_Count = count - - (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - env->cp0_count_ns); - /* Update timer timer */ - cpu_mips_timer_update(env); - } -} - -void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value) -{ - env->CP0_Compare = value; - if (!(env->CP0_Cause & (1 << CP0Ca_DC))) { - cpu_mips_timer_update(env); - } - if (env->insn_flags & ISA_MIPS_R2) { - env->CP0_Cause &= ~(1 << CP0Ca_TI); - } - qemu_irq_lower(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); -} - -void cpu_mips_start_count(CPUMIPSState *env) -{ - cpu_mips_store_count(env, env->CP0_Count); -} - -void cpu_mips_stop_count(CPUMIPSState *env) -{ - /* Store the current value */ - env->CP0_Count += (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - env->cp0_count_ns); -} - -static void mips_timer_cb(void *opaque) -{ - CPUMIPSState *env; - - env = opaque; - - if (env->CP0_Cause & (1 << CP0Ca_DC)) { - return; - } - - /* - * ??? This callback should occur when the counter is exactly equal to - * the comparator value. Offset the count by one to avoid immediately - * retriggering the callback before any virtual time has passed. - */ - env->CP0_Count++; - cpu_mips_timer_expire(env); - env->CP0_Count--; -} - -void cpu_mips_clock_init(MIPSCPU *cpu) -{ - CPUMIPSState *env = &cpu->env; - - /* - * If we're in KVM mode, don't create the periodic timer, that is handled in - * kernel. - */ - if (!kvm_enabled()) { - env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env); - } -} |