diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-10-12 11:57:48 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-10-17 11:13:15 +0200 |
| commit | 2dc29222a6f7c87300c1a7e1982e11422d34595e (patch) | |
| tree | 2c1faf1dc625d2d038a828b5b081fd3e9838f68f /target/mips/cp0_helper.c | |
| parent | 88a844545e0fb1fa95a55888fb31024fcfc9720b (diff) | |
target/mips: Move cpu_mips_get_random() with CP0 helpers
The get_random() helper uses the CP0_Wired register, which is
unrelated to the CP0_Count register used as timer.
Commit e16fe40c872 ("Move the MIPS CPU timer in a separate file")
incorrectly moved this get_random() helper with timer specific
code. Move it back to generic CP0 helpers.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-Id: <20201012095804.3335117-6-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cp0_helper.c')
| -rw-r--r-- | target/mips/cp0_helper.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index de64add038..12143ac55b 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -203,6 +203,31 @@ static void sync_c0_entryhi(CPUMIPSState *cpu, int tc) *tcst |= asid; } +/* XXX: do not use a global */ +uint32_t cpu_mips_get_random(CPUMIPSState *env) +{ + static uint32_t seed = 1; + static uint32_t prev_idx; + uint32_t idx; + uint32_t nb_rand_tlb = env->tlb->nb_tlb - env->CP0_Wired; + + if (nb_rand_tlb == 1) { + return env->tlb->nb_tlb - 1; + } + + /* Don't return same value twice, so get another value */ + do { + /* + * Use a simple algorithm of Linear Congruential Generator + * from ISO/IEC 9899 standard. + */ + seed = 1103515245 * seed + 12345; + idx = (seed >> 16) % nb_rand_tlb + env->CP0_Wired; + } while (idx == prev_idx); + prev_idx = idx; + return idx; +} + /* CP0 helpers */ target_ulong helper_mfc0_mvpcontrol(CPUMIPSState *env) { |