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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-24 18:03:09 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-05-25 16:01:44 +0100 |
| commit | e6eba6e532a5f19519d925c8f68da032537abcac (patch) | |
| tree | 1b948454d2264b3ee6594809241084480753ef98 /target/microblaze | |
| parent | 7d47ac94a7c15e820d41adda4cf706c2001e675c (diff) | |
target/arm: Implement SVE2 XAR
In addition, use the same vector generator interface for AdvSIMD.
This fixes a bug in which the AdvSIMD insn failed to clear the
high bits of the SVE register.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-44-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/microblaze')
0 files changed, 0 insertions, 0 deletions