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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-13 20:02:07 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:13 +0200
commit0a87e691b3924d5e3964dd1b77eb88b000dd4126 (patch)
tree44090719a0f721f125918fb33b9511154698db6c /target/microblaze
parent0dc4af5c1a0e8d3f73b176f8fd3159e77a4c2492 (diff)
target-microblaze: Remove pointer indirection for ld/st addresses
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/translate.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 2a4546ec3d..ee17334959 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -848,7 +848,7 @@ static void dec_imm(DisasContext *dc)
dc->clear_imm = 0;
}
-static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
+static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 t)
{
bool extimm = dc->tb_flags & IMM_FLAG;
/* Should be set to true if r1 is used by loadstores. */
@@ -863,10 +863,10 @@ static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
if (!dc->type_b) {
/* If any of the regs is r0, set t to the value of the other reg. */
if (dc->ra == 0) {
- tcg_gen_mov_i32(*t, cpu_R[dc->rb]);
+ tcg_gen_mov_i32(t, cpu_R[dc->rb]);
return;
} else if (dc->rb == 0) {
- tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
+ tcg_gen_mov_i32(t, cpu_R[dc->ra]);
return;
}
@@ -874,27 +874,27 @@ static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
stackprot = true;
}
- tcg_gen_add_i32(*t, cpu_R[dc->ra], cpu_R[dc->rb]);
+ tcg_gen_add_i32(t, cpu_R[dc->ra], cpu_R[dc->rb]);
if (stackprot) {
- gen_helper_stackprot(cpu_env, *t);
+ gen_helper_stackprot(cpu_env, t);
}
return;
}
/* Immediate. */
if (!extimm) {
if (dc->imm == 0) {
- tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
+ tcg_gen_mov_i32(t, cpu_R[dc->ra]);
return;
}
- tcg_gen_movi_i32(*t, (int32_t)((int16_t)dc->imm));
- tcg_gen_add_i32(*t, cpu_R[dc->ra], *t);
+ tcg_gen_movi_i32(t, (int32_t)((int16_t)dc->imm));
+ tcg_gen_add_i32(t, cpu_R[dc->ra], t);
} else {
- tcg_gen_add_i32(*t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
+ tcg_gen_add_i32(t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
}
if (stackprot) {
- gen_helper_stackprot(cpu_env, *t);
+ gen_helper_stackprot(cpu_env, t);
}
return;
}
@@ -929,7 +929,7 @@ static void dec_load(DisasContext *dc)
t_sync_flags(dc);
addr = tcg_temp_new_i32();
- compute_ldst_addr(dc, &addr);
+ compute_ldst_addr(dc, addr);
/*
* When doing reverse accesses we need to do two things.
@@ -1041,7 +1041,7 @@ static void dec_store(DisasContext *dc)
sync_jmpstate(dc);
/* SWX needs a temp_local. */
addr = ex ? tcg_temp_local_new_i32() : tcg_temp_new_i32();
- compute_ldst_addr(dc, &addr);
+ compute_ldst_addr(dc, addr);
if (ex) { /* swx */
TCGv_i32 tval;