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authorRichard Henderson <richard.henderson@linaro.org>2020-08-25 06:29:47 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:41:38 -0700
commit480d29a8fa842ca94297600397041f0efb0c7bd0 (patch)
tree8aefb3d5ac9db04270ac00a52535be063d5efb61 /target/microblaze
parent9b1585589dd4f9a1357f49d233039db6c4788bf3 (diff)
target/microblaze: Tidy mb_tcg_init
All of the tcg globals can be recorded in the same table. Drop the "r" prefix from "rpc" and "rmsr". Obviates the need for regnames[], which was incorrectly not const. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/translate.c66
1 files changed, 29 insertions, 37 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 9aa63ddcc5..e709884f2d 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -95,14 +95,6 @@ typedef struct DisasContext {
int singlestep_enabled;
} DisasContext;
-static const char *regnames[] =
-{
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-};
-
static inline void t_sync_flags(DisasContext *dc)
{
/* Synch the tb dependent flags between translator and runtime. */
@@ -1846,36 +1838,36 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
void mb_tcg_init(void)
{
- int i;
+#define R(X) { &cpu_R[X], offsetof(CPUMBState, regs[X]), "r" #X }
+#define SP(X) { &cpu_##X, offsetof(CPUMBState, X), #X }
+
+ static const struct {
+ TCGv_i32 *var; int ofs; char name[8];
+ } i32s[] = {
+ R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
+ R(8), R(9), R(10), R(11), R(12), R(13), R(14), R(15),
+ R(16), R(17), R(18), R(19), R(20), R(21), R(22), R(23),
+ R(24), R(25), R(26), R(27), R(28), R(29), R(30), R(31),
+
+ SP(pc),
+ SP(msr),
+ SP(imm),
+ SP(iflags),
+ SP(btaken),
+ SP(btarget),
+ SP(res_val),
+ };
+
+#undef R
+#undef SP
+
+ for (int i = 0; i < ARRAY_SIZE(i32s); ++i) {
+ *i32s[i].var =
+ tcg_global_mem_new_i32(cpu_env, i32s[i].ofs, i32s[i].name);
+ }
- cpu_iflags = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, iflags),
- "iflags");
- cpu_imm = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, imm),
- "imm");
- cpu_btarget = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, btarget),
- "btarget");
- cpu_btaken = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, btaken),
- "btaken");
- cpu_res_addr = tcg_global_mem_new(cpu_env,
- offsetof(CPUMBState, res_addr),
- "res_addr");
- cpu_res_val = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, res_val),
- "res_val");
- for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
- cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMBState, regs[i]),
- regnames[i]);
- }
-
- cpu_pc =
- tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, pc), "rpc");
- cpu_msr =
- tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, msr), "rmsr");
+ cpu_res_addr =
+ tcg_global_mem_new(cpu_env, offsetof(CPUMBState, res_addr), "res_addr");
}
void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb,