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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-02-07 13:35:58 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-03-06 22:23:09 +0100
commit1ea4a06af0f6578e5d0ddcea148503290b1c4907 (patch)
tree060b35cfbdf984ec058efb07d1815283b1058dd0 /target/microblaze
parent36861198754af7577c73cdb19e1e385c933bfdc8 (diff)
target: Use CPUArchState as interface to target-specific CPU state
While CPUState is our interface with generic code, CPUArchState is our interface with target-specific code. Use CPUArchState as an abstract type, defined by each target. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-13-f4bug@amsat.org>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/cpu.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e9cd0b88de..acfd35d3f7 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -24,7 +24,7 @@
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
-typedef struct CPUMBState CPUMBState;
+typedef struct CPUArchState CPUMBState;
#if !defined(CONFIG_USER_ONLY)
#include "mmu.h"
#endif
@@ -239,7 +239,7 @@ typedef struct CPUMBState CPUMBState;
#define USE_NON_SECURE_M_AXI_DC_MASK 0x4
#define USE_NON_SECURE_M_AXI_IC_MASK 0x8
-struct CPUMBState {
+struct CPUArchState {
uint32_t bvalue; /* TCG temporary, only valid during a TB */
uint32_t btarget; /* Full resolved branch destination */
@@ -394,7 +394,6 @@ void mb_tcg_init(void);
#define MMU_USER_IDX 2
/* See NB_MMU_MODES further up the file. */
-typedef CPUMBState CPUArchState;
typedef MicroBlazeCPU ArchCPU;
#include "exec/cpu-all.h"