diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-09-04 11:11:28 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-07 12:58:08 -0700 |
| commit | a4bcfc3380c7fab42613dc5747d4b48f0bae29df (patch) | |
| tree | dcc85f1c62ec15d01d7308b3f994d77aaed2ca03 /target/microblaze/translate.c | |
| parent | a0b2d16a09374464450c47f280fc10df70a5de72 (diff) | |
target/microblaze: Move pvr regs to MicroBlazeCPUConfig
These values are constant, and are derived from the other
configuration knobs. Move them into MicroBlazeCPUConfig
to emphasize that they are not variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/translate.c')
| -rw-r--r-- | target/microblaze/translate.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index ff0cb7dbb6..9e4551d99b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1539,7 +1539,8 @@ static bool trans_mfs(DisasContext *dc, arg_mfs *arg) case 0x2000 ... 0x200c: tcg_gen_ld_i32(dest, cpu_env, - offsetof(CPUMBState, pvr.regs[arg->rs - 0x2000])); + offsetof(MicroBlazeCPU, cfg.pvr_regs[arg->rs - 0x2000]) + - offsetof(MicroBlazeCPU, env)); break; default: qemu_log_mask(LOG_GUEST_ERROR, "Invalid mfs reg 0x%x\n", arg->rs); |