diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2019-01-23 11:59:42 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-23 11:59:42 +0000 |
| commit | fcb700b729892ddc6d0c16a6f88a95a333af3ca0 (patch) | |
| tree | cc211c65f6a3f3373b167a3f4497546b33af7755 /target/microblaze/op_helper.c | |
| parent | 9f33051abce238ab43a23125e237aac8b0931b88 (diff) | |
| parent | 2867a96ffb63fa363820e4b0110b96a06218068b (diff) | |
Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2019-01-22.for-upstream' into staging
Pullreq 2019-01-22
# gpg: Signature made Tue 22 Jan 2019 11:42:41 GMT
# gpg: using RSA key 29C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>"
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>"
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83
* remotes/edgar/tags/edgar/xilinx-next-2019-01-22.for-upstream:
target/microblaze: Add props enabling exceptions on failed bus accesses
hw/microblaze: s3adsp1800: Create an unimplemented GPIO area
target/microblaze: Switch to transaction_failed hook
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/microblaze/op_helper.c')
| -rw-r--r-- | target/microblaze/op_helper.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 7cdbbcccae..e23dcfdc20 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -486,26 +486,28 @@ void helper_mmu_write(CPUMBState *env, uint32_t ext, uint32_t rn, uint32_t v) mmu_write(env, ext, rn, v); } -void mb_cpu_unassigned_access(CPUState *cs, hwaddr addr, - bool is_write, bool is_exec, int is_asi, - unsigned size) +void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr) { MicroBlazeCPU *cpu; CPUMBState *env; - - qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n", - addr, is_write ? 1 : 0, is_exec ? 1 : 0); - if (cs == NULL) { - return; - } + qemu_log_mask(CPU_LOG_INT, "Transaction failed: vaddr 0x%" VADDR_PRIx + " physaddr 0x" TARGET_FMT_plx " size %d access type %s\n", + addr, physaddr, size, + access_type == MMU_INST_FETCH ? "INST_FETCH" : + (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE")); cpu = MICROBLAZE_CPU(cs); env = &cpu->env; + + cpu_restore_state(cs, retaddr, true); if (!(env->sregs[SR_MSR] & MSR_EE)) { return; } env->sregs[SR_EAR] = addr; - if (is_exec) { + if (access_type == MMU_INST_FETCH) { if ((env->pvr.regs[2] & PVR2_IOPB_BUS_EXC_MASK)) { env->sregs[SR_ESR] = ESR_EC_INSN_BUS; helper_raise_exception(env, EXCP_HW_EXCP); |