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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-15 23:18:49 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:14 +0200
commita2207b593b6d7e164e6d4a587aec4cd885a8e855 (patch)
treed1f82ee76022f8c22372d426fbed5f3a2a5201c0 /target/microblaze/mmu.h
parenta1b48e3a3aa19d6e03b6c39cae4e915f5cceb028 (diff)
target-microblaze: mmu: Add R_TBLX_MISS macros
Add a R_TBLX_MISS MASK and SHIFT macros. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/mmu.h')
-rw-r--r--target/microblaze/mmu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 3b7a9983d5..113539c6e9 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -54,6 +54,10 @@
#define TLB_M 0x00000002 /* Memory is coherent */
#define TLB_G 0x00000001 /* Memory is guarded from prefetch */
+/* TLBX */
+#define R_TBLX_MISS_SHIFT 31
+#define R_TBLX_MISS_MASK (1U << R_TBLX_MISS_SHIFT)
+
#define TLB_ENTRIES 64
struct microblaze_mmu