diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-08-19 21:33:32 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-01 07:41:38 -0700 |
| commit | 76e8187d0078e6b926a9a648fb755df4dd266e05 (patch) | |
| tree | d4fdbdd7956725275013822ca22cfbb6bd834fe8 /target/microblaze/mmu.c | |
| parent | 8a42ddf013738a15c9cb739b9dfc07500cb27a21 (diff) | |
target/microblaze: Split out PC from env->sregs
Begin eliminating the sregs array in favor of individual members.
Does not correct the width of pc, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/mmu.c')
| -rw-r--r-- | target/microblaze/mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index 6763421ba2..3f403b567b 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -251,7 +251,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, uint32_t v) if (i < 3 && !(v & TLB_VALID) && qemu_loglevel_mask(~0)) qemu_log_mask(LOG_GUEST_ERROR, "invalidating index %x at pc=%" PRIx64 "\n", - i, env->sregs[SR_PC]); + i, env->pc); env->mmu.tids[i] = env->mmu.regs[MMU_R_PID] & 0xff; mmu_flush_idx(env, i); } |