diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-09-04 12:08:24 -0700 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2020-09-07 12:34:17 +0200 |
| commit | 88e74b6122bb40852b1c98befd47a572f0c06930 (patch) | |
| tree | ffc95474b4531f624455deba98b68409cc98fe30 /target/microblaze/helper.c | |
| parent | cc9962d8ea80b39118d921109fd2f8db308e1d4a (diff) | |
target/microblaze: Collected fixes for env->iflags
There are several problems here that can result in soft lockup,
depending on exactly where an interrupt or exception is delivered:
Include BIMM_FLAG in IFLAGS_TB_MASK, since it needs to follow D_FLAG.
Ensure that iflags is 0 when entering an interrupt/exception handler.
Add mb_cpu_synchronize_from_tb to restore iflags from tb->flags.
The change to t_sync_flags is cosmetic, but makes the code clearer.
This fixes the reported regression in acceptance/replay_kernel.py.
Fixes: 683a247ed7a4 ("target/microblaze: Store "current" iflags in insn_start")
Tested-by: Thomas Huth <thuth@redhat.com>
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200904190842.2282109-2-richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target/microblaze/helper.c')
| -rw-r--r-- | target/microblaze/helper.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 48547385b0..00090526da 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -113,7 +113,10 @@ void mb_cpu_do_interrupt(CPUState *cs) uint32_t t, msr = mb_cpu_read_msr(env); /* IMM flag cannot propagate across a branch and into the dslot. */ - assert(!((env->iflags & D_FLAG) && (env->iflags & IMM_FLAG))); + assert((env->iflags & (D_FLAG | IMM_FLAG)) != (D_FLAG | IMM_FLAG)); + /* BIMM flag cannot be set without D_FLAG. */ + assert((env->iflags & (D_FLAG | BIMM_FLAG)) != BIMM_FLAG); + /* RTI flags are private to translate. */ assert(!(env->iflags & (DRTI_FLAG | DRTE_FLAG | DRTB_FLAG))); env->res_addr = RES_ADDR_NONE; switch (cs->exception_index) { @@ -146,7 +149,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->pc, env->ear, env->esr, env->iflags); log_cpu_state_mask(CPU_LOG_INT, cs, 0); - env->iflags &= ~(IMM_FLAG | D_FLAG); + env->iflags = 0; env->pc = cpu->cfg.base_vectors + 0x20; break; @@ -186,14 +189,14 @@ void mb_cpu_do_interrupt(CPUState *cs) "exception at pc=%x ear=%" PRIx64 " iflags=%x\n", env->pc, env->ear, env->iflags); log_cpu_state_mask(CPU_LOG_INT, cs, 0); - env->iflags &= ~(IMM_FLAG | D_FLAG); + env->iflags = 0; env->pc = cpu->cfg.base_vectors + 0x20; break; case EXCP_IRQ: assert(!(msr & (MSR_EIP | MSR_BIP))); assert(msr & MSR_IE); - assert(!(env->iflags & D_FLAG)); + assert(!(env->iflags & (D_FLAG | IMM_FLAG))); t = (msr & (MSR_VM | MSR_UM)) << 1; @@ -226,13 +229,14 @@ void mb_cpu_do_interrupt(CPUState *cs) mb_cpu_write_msr(env, msr); env->regs[14] = env->pc; + env->iflags = 0; env->pc = cpu->cfg.base_vectors + 0x10; //log_cpu_state_mask(CPU_LOG_INT, cs, 0); break; case EXCP_HW_BREAK: - assert(!(env->iflags & IMM_FLAG)); - assert(!(env->iflags & D_FLAG)); + assert(!(env->iflags & (D_FLAG | IMM_FLAG))); + t = (msr & (MSR_VM | MSR_UM)) << 1; qemu_log_mask(CPU_LOG_INT, "break at pc=%x msr=%x %x iflags=%x\n", @@ -242,6 +246,7 @@ void mb_cpu_do_interrupt(CPUState *cs) msr |= t; msr |= MSR_BIP; env->regs[16] = env->pc; + env->iflags = 0; env->pc = cpu->cfg.base_vectors + 0x18; mb_cpu_write_msr(env, msr); break; |