diff options
| author | Lucien Murray-Pitts <lucienmp.qemu@gmail.com> | 2019-06-09 19:51:54 +0900 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2019-06-26 17:12:57 +0200 |
| commit | bf1fa6912dd44463b00ca1c4f006a807b2940466 (patch) | |
| tree | 5341ab622d8f0dc0ea7852ec4787d776e6599208 /target/m68k | |
| parent | 474f3938d79ab36b9231c9ad3b5a9314c2aeacde (diff) | |
The m68k gdbstub SR reg request doesnt include Condition-Codes
The register request via gdbstub would return the SR part
which contains the Trace/Master/IRQ state flags, but
would be missing the CR (Condition Register) state bits.
This fix adds this support by merging them in the m68k
specific gdbstub handler m68k_cpu_gdb_read_register for SR register.
Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190609105154.GA16755@localhost.localdomain>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target/m68k')
| -rw-r--r-- | target/m68k/gdbstub.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c index e6baf0601e..5cad2b658f 100644 --- a/target/m68k/gdbstub.c +++ b/target/m68k/gdbstub.c @@ -35,7 +35,8 @@ int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) } else { switch (n) { case 16: - return gdb_get_reg32(mem_buf, env->sr); + /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */ + return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env)); case 17: return gdb_get_reg32(mem_buf, env->pc); } |