diff options
| author | Laurent Vivier <laurent@vivier.eu> | 2018-01-18 20:38:41 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2018-01-25 16:02:24 +0100 |
| commit | 88b2fef6c3c3b45ac0dc2196ace7248a09c8e41d (patch) | |
| tree | 3b1acfcbd019e96dd15217f52066fcd314797e02 /target/m68k/translate.c | |
| parent | 98670d47cd8d63a529ff230fd39ddaa186156f8c (diff) | |
target/m68k: add MC68040 MMU
Only add MC68040 MMU page table processing and related
registers (Special Status Word, Translation Control Register,
User Root Pointer and Supervisor Root Pointer).
Transparent Translation Registers, DFC/SFC and pflush/ptest
will be added later.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180118193846.24953-3-laurent@vivier.eu>
Diffstat (limited to 'target/m68k/translate.c')
| -rw-r--r-- | target/m68k/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index ea18df940a..fd6db3e1fc 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -5980,6 +5980,8 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP], env->current_sp == M68K_ISP ? "->" : " ", env->sp[M68K_ISP]); cpu_fprintf(f, "VBR = 0x%08x\n", env->vbr); + cpu_fprintf(f, "SSW %08x TCR %08x URP %08x SRP %08x\n", + env->mmu.ssw, env->mmu.tcr, env->mmu.urp, env->mmu.srp); #endif } |