aboutsummaryrefslogtreecommitdiff
path: root/target/m68k/op_helper.c
diff options
context:
space:
mode:
authorLaurent Vivier <laurent@vivier.eu>2018-01-18 20:38:45 +0100
committerLaurent Vivier <laurent@vivier.eu>2018-01-25 16:02:25 +0100
commite55886c3340c3a3f1267a3a3d42082008bb255fb (patch)
tree31bd715c14a4acccb313d417817faa0ab0799aca /target/m68k/op_helper.c
parent5fa9f1f28321f7268e68e58cff8c61a2ab817f91 (diff)
target/m68k: add pflush/ptest
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-7-laurent@vivier.eu>
Diffstat (limited to 'target/m68k/op_helper.c')
-rw-r--r--target/m68k/op_helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 4609caa546..ffea9693fc 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -466,6 +466,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write,
}
if (m68k_feature(env, M68K_FEATURE_M68040)) {
+ env->mmu.mmusr = 0;
env->mmu.ssw |= M68K_ATC_040;
/* FIXME: manage MMU table access error */
env->mmu.ssw &= ~M68K_TM_040;