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authorPeter Maydell <peter.maydell@linaro.org>2019-05-17 10:28:23 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-05-17 10:28:23 +0100
commitb0f9690e78827d55a508c73432c73f057f59fd41 (patch)
treeedd913c2d05dd5d2113705e320c0c6c05ceee142 /target/m68k/helper.c
parentd8276573da58e8ce78dab8c46dd660efd664bcb7 (diff)
parent60d3d0cfeb1658d2827d6a4f0df27252bb36baba (diff)
Merge remote-tracking branch 'remotes/vivier/tags/m68k-staging-pull-request' into staging
code cleanup, switch to transaction_failed hook # gpg: Signature made Thu 16 May 2019 23:33:00 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-staging-pull-request: target/m68k: Optimize rotate_x() using extract_i32() target/m68k: Fix a tcg_temp leak target/m68k: Reduce the l1 TCGLabel scope target/m68k: Switch to transaction_failed hook target/m68k: In get_physical_address() check for memory access failures target/m68k: In dump_address_map() check for memory access failures Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/m68k/cpu.h
Diffstat (limited to 'target/m68k/helper.c')
-rw-r--r--target/m68k/helper.c84
1 files changed, 67 insertions, 17 deletions
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 9fc9e646ff..6db93bdd81 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -390,6 +390,7 @@ static void dump_address_map(CPUM68KState *env, uint32_t root_pointer)
int last_attr = -1, attr = -1;
M68kCPU *cpu = m68k_env_get_cpu(env);
CPUState *cs = CPU(cpu);
+ MemTxResult txres;
if (env->mmu.tcr & M68K_TCR_PAGE_8K) {
/* 8k page */
@@ -403,22 +404,29 @@ static void dump_address_map(CPUM68KState *env, uint32_t root_pointer)
tib_mask = M68K_4K_PAGE_MASK;
}
for (i = 0; i < M68K_ROOT_POINTER_ENTRIES; i++) {
- tia = ldl_phys(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4);
- if (!M68K_UDT_VALID(tia)) {
+ tia = address_space_ldl(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK || !M68K_UDT_VALID(tia)) {
continue;
}
for (j = 0; j < M68K_ROOT_POINTER_ENTRIES; j++) {
- tib = ldl_phys(cs->as, M68K_POINTER_BASE(tia) + j * 4);
- if (!M68K_UDT_VALID(tib)) {
+ tib = address_space_ldl(cs->as, M68K_POINTER_BASE(tia) + j * 4,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK || !M68K_UDT_VALID(tib)) {
continue;
}
for (k = 0; k < tic_size; k++) {
- tic = ldl_phys(cs->as, (tib & tib_mask) + k * 4);
- if (!M68K_PDT_VALID(tic)) {
+ tic = address_space_ldl(cs->as, (tib & tib_mask) + k * 4,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK || !M68K_PDT_VALID(tic)) {
continue;
}
if (M68K_PDT_INDIRECT(tic)) {
- tic = ldl_phys(cs->as, M68K_INDIRECT_POINTER(tic));
+ tic = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(tic),
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ continue;
+ }
}
last_logical = logical;
@@ -630,6 +638,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
bool debug = access_type & ACCESS_DEBUG;
int page_bits;
int i;
+ MemTxResult txres;
/* Transparent Translation (physical = logical) */
for (i = 0; i < M68K_MAX_TTR; i++) {
@@ -659,12 +668,19 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
/* Root Index */
entry = M68K_POINTER_BASE(next) | M68K_ROOT_INDEX(address);
- next = ldl_phys(cs->as, entry);
+ next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
if (!M68K_UDT_VALID(next)) {
return -1;
}
if (!(next & M68K_DESC_USED) && !debug) {
- stl_phys(cs->as, entry, next | M68K_DESC_USED);
+ address_space_stl(cs->as, entry, next | M68K_DESC_USED,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
if (next & M68K_DESC_WRITEPROT) {
if (access_type & ACCESS_PTEST) {
@@ -679,12 +695,19 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
/* Pointer Index */
entry = M68K_POINTER_BASE(next) | M68K_POINTER_INDEX(address);
- next = ldl_phys(cs->as, entry);
+ next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
if (!M68K_UDT_VALID(next)) {
return -1;
}
if (!(next & M68K_DESC_USED) && !debug) {
- stl_phys(cs->as, entry, next | M68K_DESC_USED);
+ address_space_stl(cs->as, entry, next | M68K_DESC_USED,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
if (next & M68K_DESC_WRITEPROT) {
if (access_type & ACCESS_PTEST) {
@@ -703,27 +726,46 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
entry = M68K_4K_PAGE_BASE(next) | M68K_4K_PAGE_INDEX(address);
}
- next = ldl_phys(cs->as, entry);
+ next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
if (!M68K_PDT_VALID(next)) {
return -1;
}
if (M68K_PDT_INDIRECT(next)) {
- next = ldl_phys(cs->as, M68K_INDIRECT_POINTER(next));
+ next = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(next),
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
if (access_type & ACCESS_STORE) {
if (next & M68K_DESC_WRITEPROT) {
if (!(next & M68K_DESC_USED) && !debug) {
- stl_phys(cs->as, entry, next | M68K_DESC_USED);
+ address_space_stl(cs->as, entry, next | M68K_DESC_USED,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
} else if ((next & (M68K_DESC_MODIFIED | M68K_DESC_USED)) !=
(M68K_DESC_MODIFIED | M68K_DESC_USED) && !debug) {
- stl_phys(cs->as, entry,
- next | (M68K_DESC_MODIFIED | M68K_DESC_USED));
+ address_space_stl(cs->as, entry,
+ next | (M68K_DESC_MODIFIED | M68K_DESC_USED),
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
} else {
if (!(next & M68K_DESC_USED) && !debug) {
- stl_phys(cs->as, entry, next | M68K_DESC_USED);
+ address_space_stl(cs->as, entry, next | M68K_DESC_USED,
+ MEMTXATTRS_UNSPECIFIED, &txres);
+ if (txres != MEMTX_OK) {
+ goto txfail;
+ }
}
}
@@ -755,6 +797,14 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
}
return 0;
+
+txfail:
+ /*
+ * A page table load/store failed. TODO: we should really raise a
+ * suitable guest fault here if this is not a debug access.
+ * For now just return that the translation failed.
+ */
+ return -1;
}
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)