diff options
author | Jiajie Chen <c@jia.je> | 2023-08-21 14:59:57 +0200 |
---|---|---|
committer | Song Gao <gaosong@loongson.cn> | 2023-08-24 11:17:56 +0800 |
commit | 19f82a4a6ae6da44fb8167bd3b415025d914f428 (patch) | |
tree | 3477dfb3f8a6c31175486602eacdd3c57529ca0b /target/loongarch | |
parent | e389358e569628dec1e3be6210621d64335f0c90 (diff) |
target/loongarch: Add function to check current arch
Add is_la64 function to check if the current cpucfg[1].arch equals to
2(LA64).
Signed-off-by: Jiajie Chen <c@jia.je>
Co-authored-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20230817093121.1053890-2-gaosong@loongson.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230821125959.28666-7-philmd@linaro.org>
Diffstat (limited to 'target/loongarch')
-rw-r--r-- | target/loongarch/cpu.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index c50b3a5ef3..3235ad081f 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -132,6 +132,11 @@ FIELD(CPUCFG1, HP, 24, 1) FIELD(CPUCFG1, IOCSR_BRD, 25, 1) FIELD(CPUCFG1, MSG_INT, 26, 1) +/* cpucfg[1].arch */ +#define CPUCFG1_ARCH_LA32R 0 +#define CPUCFG1_ARCH_LA32 1 +#define CPUCFG1_ARCH_LA64 2 + /* cpucfg[2] bits */ FIELD(CPUCFG2, FP, 0, 1) FIELD(CPUCFG2, FP_SP, 1, 1) @@ -421,6 +426,11 @@ static inline int cpu_mmu_index(CPULoongArchState *env, bool ifetch) #endif } +static inline bool is_la64(CPULoongArchState *env) +{ + return FIELD_EX32(env->cpucfg[1], CPUCFG1, ARCH) == CPUCFG1_ARCH_LA64; +} + /* * LoongArch CPUs hardware flags. */ |