diff options
| author | Song Gao <gaosong@loongson.cn> | 2022-06-06 20:42:59 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:09:03 +0000 |
| commit | 8708a04a6145b4c9289fed28358fb1273dcd6aea (patch) | |
| tree | 7b055dacdd70fabb44a79a0948e96940fe7abc87 /target/loongarch/translate.c | |
| parent | 94b02d57b09eeb2dcb07a2a196b91310420bd0bf (diff) | |
target/loongarch: Add fixed point extra instruction translation
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-10-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/translate.c')
| -rw-r--r-- | target/loongarch/translate.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 01791bf1a2..b946dc4d5f 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -155,6 +155,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext) #include "insn_trans/trans_bit.c.inc" #include "insn_trans/trans_memory.c.inc" #include "insn_trans/trans_atomic.c.inc" +#include "insn_trans/trans_extra.c.inc" static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { |