diff options
author | Xiaojuan Yang <yangxiaojuan@loongson.cn> | 2022-06-06 20:43:15 +0800 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:09:03 +0000 |
commit | 5b1dedfe848b61521aa5b46b81a4cc676e9e7c1b (patch) | |
tree | 5e119c1e5637aa79bb852e765ccd4e93271bfdb3 /target/loongarch/translate.c | |
parent | dd615fa48da89b2308a907cc4e4956771c75d68f (diff) |
target/loongarch: Add LoongArch CSR instruction
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-26-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/translate.c')
-rw-r--r-- | target/loongarch/translate.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 0ad6b7b2ee..0f098924a3 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -25,7 +25,9 @@ static TCGv cpu_lladdr, cpu_llval; TCGv_i32 cpu_fcsr0; TCGv_i64 cpu_fpr[32]; -#define DISAS_STOP DISAS_TARGET_0 +#define DISAS_STOP DISAS_TARGET_0 +#define DISAS_EXIT DISAS_TARGET_1 +#define DISAS_EXIT_UPDATE DISAS_TARGET_2 static inline int plus_1(DisasContext *ctx, int x) { @@ -172,6 +174,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext) #include "insn_trans/trans_fmov.c.inc" #include "insn_trans/trans_fmemory.c.inc" #include "insn_trans/trans_branch.c.inc" +#include "insn_trans/trans_privileged.c.inc" static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { @@ -210,6 +213,12 @@ static void loongarch_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) break; case DISAS_NORETURN: break; + case DISAS_EXIT_UPDATE: + tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + QEMU_FALLTHROUGH; + case DISAS_EXIT: + tcg_gen_exit_tb(NULL, 0); + break; default: g_assert_not_reached(); } |