diff options
| author | Song Gao <gaosong@loongson.cn> | 2022-06-06 20:42:57 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:09:03 +0000 |
| commit | bb79174d4e191dc83414072e1a7859095faed567 (patch) | |
| tree | 6558188364eeff3351e2d3ef1afa846ad6ba2d45 /target/loongarch/translate.c | |
| parent | ad08cb3f9728caf83fff7958e308ef7f1ad03fae (diff) | |
target/loongarch: Add fixed point load/store instruction translation
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-8-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/translate.c')
| -rw-r--r-- | target/loongarch/translate.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 88afd9b3a8..b8fed26699 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -31,6 +31,11 @@ static inline int plus_1(DisasContext *ctx, int x) return x + 1; } +static inline int shl_2(DisasContext *ctx, int x) +{ + return x << 2; +} + void generate_exception(DisasContext *ctx, int excp) { tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); @@ -148,6 +153,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext) #include "insn_trans/trans_arith.c.inc" #include "insn_trans/trans_shift.c.inc" #include "insn_trans/trans_bit.c.inc" +#include "insn_trans/trans_memory.c.inc" static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { |