diff options
author | Xiaojuan Yang <yangxiaojuan@loongson.cn> | 2022-06-06 20:43:13 +0800 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:09:03 +0000 |
commit | f757a2cd6948344b8303e375f6f9d72887abf1f4 (patch) | |
tree | 676655301edf8157b8b5df50256be8bee2274b84 /target/loongarch/cpu.h | |
parent | 7e1c521e2a108a4ffceecd8bec846625c956c8f8 (diff) |
target/loongarch: Add LoongArch interrupt and exception handle
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-24-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/cpu.h')
-rw-r--r-- | target/loongarch/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e0415d8929..b983ce241c 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -184,6 +184,8 @@ FIELD(CSR_CRMD, WE, 9, 1) extern const char * const regnames[32]; extern const char * const fregnames[32]; +#define N_IRQS 13 + #define LOONGARCH_STLB 2048 /* 2048 STLB */ #define LOONGARCH_MTLB 64 /* 64 MTLB */ #define LOONGARCH_TLB_MAX (LOONGARCH_STLB + LOONGARCH_MTLB) |