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authorPaolo Bonzini <pbonzini@redhat.com>2023-10-23 10:21:20 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2023-12-29 22:03:55 +0100
commit9a5922d6bdc3e047fbe52178104f9b06604f901a (patch)
tree1cc11a78a2ede12b24dc091842ab2ebd7f2813f2 /target/i386
parent1ec46bf2378fcc8a5a08d0ca062a96a0f6bc3a8c (diff)
target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0
Create a new temporary, to ease the register allocator's work. Creation of the temporary is pushed into gen_ext_tl, which also allows NULL as the first parameter now. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386')
-rw-r--r--target/i386/tcg/translate.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index afe0fa6c65..e5f7117096 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -720,6 +720,9 @@ static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign)
if (size == MO_TL) {
return src;
}
+ if (!dst) {
+ dst = tcg_temp_new();
+ }
tcg_gen_ext_tl(dst, src, size | (sign ? MO_SIGN : 0));
return dst;
}
@@ -736,9 +739,9 @@ static void gen_exts(MemOp ot, TCGv reg)
static void gen_op_j_ecx(DisasContext *s, TCGCond cond, TCGLabel *label1)
{
- tcg_gen_mov_tl(s->tmp0, cpu_regs[R_ECX]);
- gen_extu(s->aflag, s->tmp0);
- tcg_gen_brcondi_tl(cond, s->tmp0, 0, label1);
+ TCGv tmp = gen_ext_tl(NULL, cpu_regs[R_ECX], s->aflag, false);
+
+ tcg_gen_brcondi_tl(cond, tmp, 0, label1);
}
static inline void gen_op_jz_ecx(DisasContext *s, TCGLabel *label1)