diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-10-09 12:34:50 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-11-07 12:13:27 +0100 |
| commit | 82b641d6261a58d9fba5a6ce786e7d58a8876e25 (patch) | |
| tree | c8c7d32d7b8f0bcad5f84cde616620789d72cb56 /target/i386 | |
| parent | bcb9d2ea77dc83ba2591559fa2052a8ca63e591f (diff) | |
target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]()
We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable
instead of doing another QOM cast with X86_CPU().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Roman Bolshakov <roman@roolebo.dev>
Tested-by: Roman Bolshakov <roman@roolebo.dev>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231009110239.66778-6-philmd@linaro.org>
Diffstat (limited to 'target/i386')
| -rw-r--r-- | target/i386/hvf/x86_emu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index ccda568478..af1f205ecf 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -676,7 +676,7 @@ void simulate_rdmsr(struct CPUState *cpu) val = rdtscp() + rvmcs(cpu->accel->fd, VMCS_TSC_OFFSET); break; case MSR_IA32_APICBASE: - val = cpu_get_apic_base(X86_CPU(cpu)->apic_state); + val = cpu_get_apic_base(x86_cpu->apic_state); break; case MSR_IA32_UCODE_REV: val = x86_cpu->ucode_rev; @@ -776,7 +776,7 @@ void simulate_wrmsr(struct CPUState *cpu) case MSR_IA32_TSC: break; case MSR_IA32_APICBASE: - cpu_set_apic_base(X86_CPU(cpu)->apic_state, data); + cpu_set_apic_base(x86_cpu->apic_state, data); break; case MSR_FSBASE: wvmcs(cpu->accel->fd, VMCS_GUEST_FS_BASE, data); |