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authorPaolo Bonzini <pbonzini@redhat.com>2022-10-19 14:01:36 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2022-10-20 15:16:13 +0200
commit314d3eff66f41f39191aaca2e5f6e3dc81480c1b (patch)
tree0ad5c97909f2530e794e70151d651bbe9e2573ac /target/i386/ops_sse_header.h
parent0d4bcac3cac461798d810e6df54768d9613ea794 (diff)
target/i386: introduce function to set rounding mode from FPCW or MXCSR bits
VROUND, FSTCW and STMXCSR all have to perform the same conversion from x86 rounding modes to softfloat constants. Since the ISA is consistent on the meaning of the two-bit rounding modes, extract the common code into a wrapper for set_float_rounding_mode. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/ops_sse_header.h')
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