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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-02-07 13:35:58 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-03-06 22:23:09 +0100
commit1ea4a06af0f6578e5d0ddcea148503290b1c4907 (patch)
tree060b35cfbdf984ec058efb07d1815283b1058dd0 /target/i386/cpu.h
parent36861198754af7577c73cdb19e1e385c933bfdc8 (diff)
target: Use CPUArchState as interface to target-specific CPU state
While CPUState is our interface with generic code, CPUArchState is our interface with target-specific code. Use CPUArchState as an abstract type, defined by each target. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-13-f4bug@amsat.org>
Diffstat (limited to 'target/i386/cpu.h')
-rw-r--r--target/i386/cpu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e69ab5dd78..5c2cf38cab 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1431,7 +1431,7 @@ typedef struct HVFX86LazyFlags {
target_ulong auxbits;
} HVFX86LazyFlags;
-typedef struct CPUX86State {
+typedef struct CPUArchState {
/* standard registers */
target_ulong regs[CPU_NB_REGS];
target_ulong eip;
@@ -2074,7 +2074,6 @@ static inline int cpu_mmu_index_kernel(CPUX86State *env)
#define CC_SRC2 (env->cc_src2)
#define CC_OP (env->cc_op)
-typedef CPUX86State CPUArchState;
typedef X86CPU ArchCPU;
#include "exec/cpu-all.h"