diff options
| author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-05-21 22:54:24 +0100 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2018-05-21 18:59:08 -0300 |
| commit | cfeea0c021db6234c154dbc723730e81553924ff (patch) | |
| tree | d72e36a2202ff276ca218b6cc07f3fd30879b0d3 /target/i386/cpu.h | |
| parent | d19d1f965904a533998739698020ff4ee8a103da (diff) | |
i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)
"Some AMD processors only support a non-architectural means of enabling
speculative store bypass disable (SSBD). To allow a simplified view of
this to a guest, an architectural definition has been created through a new
CPUID bit, 0x80000008_EBX[25], and a new MSR, 0xc001011f. With this, a
hypervisor can virtualize the existence of this definition and provide an
architectural method for using SSBD to a guest.
Add the new CPUID feature, the new MSR and update the existing SSBD
support to use this MSR when present." (from x86/speculation: Add virtualized
speculative store bypass disable support in Linux).
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20180521215424.13520-4-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f0b68905de..8ac13f6c2c 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -351,6 +351,7 @@ typedef enum X86Seg { #define MSR_IA32_FEATURE_CONTROL 0x0000003a #define MSR_TSC_ADJUST 0x0000003b #define MSR_IA32_SPEC_CTRL 0x48 +#define MSR_VIRT_SSBD 0xc001011f #define MSR_IA32_TSCDEADLINE 0x6e0 #define FEATURE_CONTROL_LOCKED (1<<0) @@ -1210,6 +1211,7 @@ typedef struct CPUX86State { uint32_t pkru; uint64_t spec_ctrl; + uint64_t virt_ssbd; /* End of state preserved by INIT (dummy marker). */ struct {} end_init_save; |