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authorChenyi Qiang <chenyi.qiang@intel.com>2021-02-05 16:33:25 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2021-02-08 15:15:32 +0100
commit52a44ad2b92ba4cd81c2b271cd5e4a2d820e91fc (patch)
treeb7e98ea6f6ba0322c30d284ef17aa85fc654b84d /target/i386/cpu.h
parent6aa4228bd68cb251ccb5f802c015b494c6a10f19 (diff)
target/i386: Expose VMX entry/exit load pkrs control bits
Expose the VMX exit/entry load pkrs control bits in VMX_TRUE_EXIT_CTLS/VMX_TRUE_ENTRY_CTLS MSRs to guest, which supports the PKS in nested VM. Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> Message-Id: <20210205083325.13880-3-chenyi.qiang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
-rw-r--r--target/i386/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index cc5a26f35b..8d599bb5b8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -973,6 +973,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define VMX_VM_EXIT_CLEAR_BNDCFGS 0x00800000
#define VMX_VM_EXIT_PT_CONCEAL_PIP 0x01000000
#define VMX_VM_EXIT_CLEAR_IA32_RTIT_CTL 0x02000000
+#define VMX_VM_EXIT_LOAD_IA32_PKRS 0x20000000
#define VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS 0x00000004
#define VMX_VM_ENTRY_IA32E_MODE 0x00000200
@@ -984,6 +985,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define VMX_VM_ENTRY_LOAD_BNDCFGS 0x00010000
#define VMX_VM_ENTRY_PT_CONCEAL_PIP 0x00020000
#define VMX_VM_ENTRY_LOAD_IA32_RTIT_CTL 0x00040000
+#define VMX_VM_ENTRY_LOAD_IA32_PKRS 0x00400000
/* Supported Hyper-V Enlightenments */
#define HYPERV_FEAT_RELAXED 0