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authorBabu Moger <babu.moger@amd.com>2018-05-14 11:41:51 -0500
committerEduardo Habkost <ehabkost@redhat.com>2018-05-15 11:33:33 -0300
commitab8f992e3e63e91be257e4e343d386dae7be4bcb (patch)
treead3a3b1ab4a468df7c3ca45cd2b6957655927d6e /target/i386/cpu.h
parent968ee4ad25934717b9192dfed6650a6282854e17 (diff)
i386: Add new property to control cache info
The property legacy-cache will be used to control the cache information. If user passes "-cpu legacy-cache" then older information will be displayed even if the hardware supports new information. Otherwise use the statically loaded cache definitions if available. Renamed the previous cache structures to legacy_*. If there is any change in the cache information, then it needs to be initialized in builtin_x86_defs. Signed-off-by: Babu Moger <babu.moger@amd.com> Tested-by: Geoffrey McRae <geoff@hostfission.com> Message-Id: <20180514164156.27034-3-babu.moger@amd.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
-rw-r--r--target/i386/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ac94013c4a..8bc54d70bf 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1399,6 +1399,11 @@ struct X86CPU {
*/
bool enable_l3_cache;
+ /* Compatibility bits for old machine types.
+ * If true present the old cache topology information
+ */
+ bool legacy_cache;
+
/* Compatibility bits for old machine types: */
bool enable_cpuid_0xb;