diff options
| author | Vladislav Yaroshchuk <yaroshchuk2000@gmail.com> | 2021-01-13 23:53:23 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-16 17:15:39 +0100 |
| commit | 027ac0cb516cca4ce8a88dcca2f759c77e0e374b (patch) | |
| tree | dee713b396e3d9bfcd0b6b8c869c79129ecc4fc5 /target/i386/cpu.h | |
| parent | 45f918ccf6c35ee1912a8847873b7ba5b6927b46 (diff) | |
target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT
Some guests (ex. Darwin-XNU) can attemp to read this MSR to retrieve and
validate CPU topology comparing it to ACPI MADT content
MSR description from Intel Manual:
35H: MSR_CORE_THREAD_COUNT: Configured State of Enabled Processor Core
Count and Logical Processor Count
Bits 15:0 THREAD_COUNT The number of logical processors that are
currently enabled in the physical package
Bits 31:16 Core_COUNT The number of processor cores that are currently
enabled in the physical package
Bits 63:32 Reserved
Signed-off-by: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com>
Message-Id: <20210113205323.33310-1-yaroshchuk2000@gmail.com>
[RB: reordered MSR definition and dropped u suffix from shift offset]
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8d599bb5b8..82c1ac00ef 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -368,6 +368,7 @@ typedef enum X86Seg { #define MSR_IA32_SMBASE 0x9e #define MSR_SMI_COUNT 0x34 +#define MSR_CORE_THREAD_COUNT 0x35 #define MSR_MTRRcap 0xfe #define MSR_MTRRcap_VCNT 8 #define MSR_MTRRcap_FIXRANGE_SUPPORT (1 << 8) |