diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-26 10:24:35 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-05-11 04:11:14 -0400 |
| commit | 31dd35eb2d4484b70e4462a9e4a370695cc8ce8d (patch) | |
| tree | 4c7222c16590f5186d3089646059a3971937555f /target/i386/cpu.h | |
| parent | cd906d315d629da010e0ac6f84949c04d2ab7a08 (diff) | |
target/i386: extend pg_mode to more CR0 and CR4 bits
In order to unify the two stages of page table lookup, we need
mmu_translate to use either the host CR0/EFER/CR4 or the guest's.
To do so, make mmu_translate use the same pg_mode constants that
were used for the NPT lookup.
This also prepares for adding 5-level NPT support, which however does
not work yet.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index dbebd67f98..324ef92beb 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -307,6 +307,14 @@ typedef enum X86Seg { #define PG_MODE_LMA (1 << 1) #define PG_MODE_NXE (1 << 2) #define PG_MODE_PSE (1 << 3) +#define PG_MODE_LA57 (1 << 4) +#define PG_MODE_SVM_MASK MAKE_64BIT_MASK(0, 15) + +/* Bits of CR4 that do not affect the NPT page format. */ +#define PG_MODE_WP (1 << 16) +#define PG_MODE_PKE (1 << 17) +#define PG_MODE_PKS (1 << 18) +#define PG_MODE_SMEP (1 << 19) #define MCG_CTL_P (1ULL<<8) /* MCG_CAP register available */ #define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */ |