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authorPeter Maydell <peter.maydell@linaro.org>2019-04-29 18:05:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-04-29 18:05:56 +0100
commit82b2865e0d0ea4c1001e9e7ed7920bcc0458f6de (patch)
tree33bea7bef0327838d25f33e638a2528c4a3faf5e /target/hppa
parent413a99a92c13ec408dcf2adaa87918dc81e890c8 (diff)
parent437cc27ddfded3bbab6afd5ac1761e0e195edba7 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190429' into staging
target-arm queue: * remove "bag of random stuff" hw/devices.h header * implement FPU for Cortex-M and enable it for Cortex-M4 and -M33 * hw/dma: Compile the bcm2835_dma device as common object * configure: Remove --source-path option * hw/ssi/xilinx_spips: Avoid variable length array * hw/arm/smmuv3: Remove SMMUNotifierNode # gpg: Signature made Mon 29 Apr 2019 17:58:57 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190429: (42 commits) hw/devices: Move SMSC 91C111 declaration into a new header hw/net/lan9118: Export TYPE_LAN9118 and use it instead of hardcoded string hw/net/ne2000-isa: Add guards to the header hw/devices: Move LAN9118 declarations into a new header hw/devices: Move TI touchscreen declarations into a new header hw/devices: Move Gamepad declarations into a new header hw/devices: Move CBus declarations into a new header hw/devices: Move Blizzard declarations into a new header hw/devices: Move TC6393XB declarations into a new header hw/display/tc6393xb: Remove unused functions hw/arm/nseries: Use TYPE_TMP105 instead of hardcoded string hw/arm/aspeed: Use TYPE_TMP105/TYPE_PCA9552 instead of hardcoded string hw/dma: Compile the bcm2835_dma device as common object target/arm: Enable FPU for Cortex-M4 and Cortex-M33 target/arm: Implement VLLDM for v7M CPUs with an FPU target/arm: Implement VLSTM for v7M CPUs with an FPU target/arm: Implement M-profile lazy FP state preservation target/arm: Add lazy-FP-stacking support to v7m_stack_write() target/arm: New function armv7m_nvic_set_pending_lazyfp() target/arm: New helper function arm_v7m_mmu_idx_all() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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