diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2024-03-20 08:51:56 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-03-27 12:15:25 -1000 |
| commit | 7fb7c9da347731956da4a4b937c721e233482df7 (patch) | |
| tree | 66c45b3c52fc785ced591756c5b790ed2a75c5c9 /target/hppa/translate.c | |
| parent | 5012e522aca161be5c141596c66e5cc6082538a9 (diff) | |
target/hppa: Fix BE,L set of sr0
The return address comes from IA*Q_Next, and IASQ_Next
is always equal to IASQ_Back, not IASQ_Front.
Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/translate.c')
| -rw-r--r-- | target/hppa/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 19594f917e..1766a63001 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3817,7 +3817,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a) load_spr(ctx, new_spc, a->sp); if (a->l) { copy_iaoq_entry(ctx, cpu_gr[31], ctx->iaoq_n, ctx->iaoq_n_var); - tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_f); + tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_b); } if (a->n && use_nullify_skip(ctx)) { copy_iaoq_entry(ctx, cpu_iaoq_f, -1, tmp); |