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authorRichard Henderson <richard.henderson@linaro.org>2017-11-06 21:10:33 +0100
committerRichard Henderson <richard.henderson@linaro.org>2018-01-31 05:30:49 -0800
commit494737b7a24b39f3a2d537180af2a2880a0817fb (patch)
tree0e63ca72478558b7ff5579599ca990aad4483380 /target/hppa/cpu.h
parent6210db057a6f255f8d5caff1507f14185526df7a (diff)
target/hppa: Optimize for flat addressing space
Linux sets sr4-sr7 all to the same value, which means that we need not do any runtime computation to find out what space to use in forming the GVA. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/cpu.h')
-rw-r--r--target/hppa/cpu.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 54f11d4e18..40700f8425 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -282,7 +282,11 @@ static inline target_ulong hppa_form_gva(CPUHPPAState *env, uint64_t spc,
return hppa_form_gva_psw(env->psw, spc, off);
}
-/* Since PSW_CB will never need to be in tb->flags, reuse them. */
+/* Since PSW_{I,CB} will never need to be in tb->flags, reuse them.
+ * TB_FLAG_SR_SAME indicates that SR4 through SR7 all contain the
+ * same value.
+ */
+#define TB_FLAG_SR_SAME PSW_I
#define TB_FLAG_PRIV_SHIFT 8
static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc,
@@ -318,6 +322,11 @@ static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc,
*cs_base |= (uint32_t)diff;
}
}
+ if ((env->sr[4] == env->sr[5])
+ & (env->sr[4] == env->sr[6])
+ & (env->sr[4] == env->sr[7])) {
+ flags |= TB_FLAG_SR_SAME;
+ }
#endif
*pflags = flags;