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| author | Taylor Simpson <tsimpson@quicinc.com> | 2023-03-06 18:58:20 -0800 |
|---|---|---|
| committer | Taylor Simpson <tsimpson@quicinc.com> | 2023-03-06 20:47:12 -0800 |
| commit | 4d13bb51d2db3134754d3361d289f719a61c4673 (patch) | |
| tree | 8f187a70657f9f12afff46ac3ee5b3a93169df87 /target/hexagon/translate.c | |
| parent | 10849c2623af6f1c122956aaee8329b9414e637d (diff) | |
Hexagon (target/hexagon) Don't set pkt_has_store_s1 when not needed
The pkt_has_store_s1 field in CPUHexagonState is only needed in generated
helpers for scalar load instructions. See check_noshuf and mem_load[1248]
in op_helper.c.
We add logic in gen_analyze_funcs.py to set need_pkt_has_store_s1 in
DisasContext when it is needed at runtime.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-7-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/translate.c')
| -rw-r--r-- | target/hexagon/translate.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 9e5fcee1ee..01671d5451 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -333,6 +333,7 @@ static void mark_implicit_pred_writes(DisasContext *ctx) static void analyze_packet(DisasContext *ctx) { Packet *pkt = ctx->pkt; + ctx->need_pkt_has_store_s1 = false; for (int i = 0; i < pkt->num_insns; i++) { Insn *insn = &pkt->insn[i]; ctx->insn = insn; @@ -367,12 +368,15 @@ static void gen_start_packet(DisasContext *ctx) for (i = 0; i < STORES_MAX; i++) { ctx->store_width[i] = 0; } - tcg_gen_movi_tl(hex_pkt_has_store_s1, pkt->pkt_has_store_s1); ctx->s1_store_processed = false; ctx->pre_commit = true; analyze_packet(ctx); + if (ctx->need_pkt_has_store_s1) { + tcg_gen_movi_tl(hex_pkt_has_store_s1, pkt->pkt_has_store_s1); + } + /* * pregs_written is used both in the analyze phase as well as the code * gen phase, so clear it again. |