diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-22 08:31:38 +0100 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-22 08:31:38 +0100 |
commit | 6dd06214892d71cbbdd25daed7693e58afcb1093 (patch) | |
tree | 1ca618a2c803e4cd5208a5c20a01b7e7ad70d0dd /target/hexagon/translate.c | |
parent | 1cc6e1a20144c0ae360cbeb0e035fdee1bd80609 (diff) | |
parent | a305a170398d80c08e19c2ef4c8637a4f4de50e1 (diff) |
Merge tag 'pull-hex-20230421' of https://github.com/quic/qemu into staging
Hexagon update
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# gpg: Signature made Fri 21 Apr 2023 05:38:16 PM BST
# gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422
* tag 'pull-hex-20230421' of https://github.com/quic/qemu:
Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructions
Hexagon (target/hexagon) Remove unused slot variable in helpers
Hexagon (tests/tcg/hexagon) Move HVX test infra to header file
Hexagon (target/hexagon) Updates to USR should use get_result_gpr
Hexagon (target/hexagon) Add overrides for count trailing zeros/ones
Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_stores
Hexagon (target/hexagon) Remove redundant/unused macros
Use black code style for python scripts
Use f-strings in python scripts
Hexagon (translate.c): avoid redundant PC updates on COF
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon/translate.c')
-rw-r--r-- | target/hexagon/translate.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 665476ab48..c087f183d0 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -128,14 +128,19 @@ static bool use_goto_tb(DisasContext *ctx, target_ulong dest) return translator_use_goto_tb(&ctx->base, dest); } -static void gen_goto_tb(DisasContext *ctx, int idx, target_ulong dest) +static void gen_goto_tb(DisasContext *ctx, int idx, target_ulong dest, bool + move_to_pc) { if (use_goto_tb(ctx, dest)) { tcg_gen_goto_tb(idx); - tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], dest); + if (move_to_pc) { + tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], dest); + } tcg_gen_exit_tb(ctx->base.tb, idx); } else { - tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], dest); + if (move_to_pc) { + tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], dest); + } tcg_gen_lookup_and_goto_ptr(); } } @@ -150,11 +155,11 @@ static void gen_end_tb(DisasContext *ctx) if (ctx->branch_cond != TCG_COND_ALWAYS) { TCGLabel *skip = gen_new_label(); tcg_gen_brcondi_tl(ctx->branch_cond, hex_branch_taken, 0, skip); - gen_goto_tb(ctx, 0, ctx->branch_dest); + gen_goto_tb(ctx, 0, ctx->branch_dest, true); gen_set_label(skip); - gen_goto_tb(ctx, 1, ctx->next_PC); + gen_goto_tb(ctx, 1, ctx->next_PC, false); } else { - gen_goto_tb(ctx, 0, ctx->branch_dest); + gen_goto_tb(ctx, 0, ctx->branch_dest, true); } } else if (ctx->is_tight_loop && pkt->insn[pkt->num_insns - 1].opcode == J2_endloop0) { @@ -165,9 +170,9 @@ static void gen_end_tb(DisasContext *ctx) TCGLabel *skip = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_LEU, hex_gpr[HEX_REG_LC0], 1, skip); tcg_gen_subi_tl(hex_gpr[HEX_REG_LC0], hex_gpr[HEX_REG_LC0], 1); - gen_goto_tb(ctx, 0, ctx->base.tb->pc); + gen_goto_tb(ctx, 0, ctx->base.tb->pc, true); gen_set_label(skip); - gen_goto_tb(ctx, 1, ctx->next_PC); + gen_goto_tb(ctx, 1, ctx->next_PC, false); } else { tcg_gen_lookup_and_goto_ptr(); } @@ -803,13 +808,11 @@ static void gen_commit_packet(DisasContext *ctx) g_assert(!has_store_s1 && !has_hvx_store); process_dczeroa(ctx); } else if (has_hvx_store) { - TCGv mem_idx = tcg_constant_tl(ctx->mem_idx); - if (!has_store_s0 && !has_store_s1) { + TCGv mem_idx = tcg_constant_tl(ctx->mem_idx); gen_helper_probe_hvx_stores(cpu_env, mem_idx); } else { int mask = 0; - TCGv mask_tcgv; if (has_store_s0) { mask = @@ -834,8 +837,10 @@ static void gen_commit_packet(DisasContext *ctx) FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED, 1); } - mask_tcgv = tcg_constant_tl(mask); - gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, mask_tcgv, mem_idx); + mask = FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX, + ctx->mem_idx); + gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, + tcg_constant_tl(mask)); } } else if (has_store_s0 && has_store_s1) { /* |